Ports/riscv64: различия между версиями

Материал из ALT Linux Wiki
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[http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/ Пакеты] [http://0x1.tv/20180929H собираются] на/для [https://www.crowdsupply.com/sifive/hifive-unleashed HiFive Unleashed].
= '''RISC-V''' =
 
RISC-V is an [https://riscv.org/risc-v-isa open and free instruction set architecture (ISA)].
The RISC-V ISA specifications are licensed under a [https://creativecommons.org/licenses/by/4.0/ Creative Commons license (CC BY 4.0)].
Anyone could get the final versions of the [https://riscv.org/specifications/ user-level ISA specifications] and drafts
of the [https://riscv.org/specifications/compressed-isa/ compressed] and [https://riscv.org/specifications/privileged-isa/ privileged] ISA specifications.
 
Another key feature of the RISC-V architecture that it is scalable and allows multiple implementations. The minimal specification has the
commands to store and load, jump and integer arithmetic. It supports the 32-, 64- and 128-bit register sizes: "RV32I, RV64I and RV128I" ("I" stands for integer).
This Linux port runs on "RV64IMAFDC" or "RV64GC" ("G" == "IMAFD"):
* <tt>'''I'''</tt> - Integer and basic instructions
* <tt>'''M'''</tt> - Multiply and divide
* <tt>'''A'''</tt> - Atomic operations
* <tt>'''F'''</tt> - Single precision floating point
* <tt>'''D'''</tt> - Double precision floating point
* <tt>'''C'''</tt> - Compressed instructions
 
At this page one could find the latest information about the status of the ALT
porting to the new platform - RISC-V (RV64GC). The ALT port is building on the [https://www.crowdsupply.com/sifive/hifive-unleashed HiFive Unleashed] board from SiFive.
 
 
== '''Working plan''' ==
 
* The following Linux kernels has been bare metal tested on SiFive HiFive Unleashed:
** 4.15
** 4.19-rc2
** 4.19.6 ([http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/RPMS.hasher/kernel-image-un-def-4.19.6-alt3.riscv64.rpm image RPM], [http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/SRPMS.hasher/kernel-image-un-def-4.19.6-alt3.src.rpm SRPM], [http://git.altlinux.org/people/arei/packages/kernel-image.git?p=kernel-image.git;a=commit;h=a420ee4217797b60b27ce60fd80a39166ddf2143 git])
 
* BOOT methods:
** Berkeley bootloader -- '''DONE'''
** U-BOOT ([http://git.altlinux.org/people/lineprinter/public/u-boot.git?p=u-boot.git;a=blob;f=README.alt;hb=HEAD link]) -- '''DONE'''
 
* Sisyphus port -- '''IN PROGRESS'''
*# Toolchain (see the status above) -- '''DONE'''
*# Linux Kernel -- '''DONE'''
*# X11 -- '''DONE'''
*# Desktop Environment -- '''IN PROGRESS'''
* ALT image metaprofile -- '''IN PROGRESS'''
* Girar Builder -- '''IN PROGRESS'''
* QEMU image ([[#QEMU|see below]]) -- '''DONE'''
 
One could find the rootfs latest snapshot (Nov 2018) at [http://ftp.altlinux.org/pub/people/arei/riscv/rootfs here].
The RPM/SRPM repository at [http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64 here].
 
== '''QEMU''' ==
 
To run the ALT RISC-V port on QEMU one need to install the QEMU with riscv64 support.
 
In case of the ALT x86-64 host system for example: [http://sisyphus.ru/en/srpm/Sisyphus/qemu qemu-system-riscv-core].
 
Next stuff are needed:
* rootfs -- [http://ftp.altlinux.org/pub/people/arei/riscv/qemu/rootfs.raw raw image] or to build a new one there is a [http://ftp.altlinux.org/pub/people/arei/riscv/qemu/rootfs.tgz tgz packed version]
* [http://ftp.altlinux.org/pub/people/arei/riscv/repo/riscv64/RPMS.hasher/kernel-image-qemu-un-def-4.19.6-alt3.noarch.rpm kernel for QEMU]
 
After this steps were done it's time to run a kernel!
 
(possibly need to change path to the kernel and rootfs according to particular system)
<source lang="shell">
qemu-system-riscv64 \
  -nographic -machine virt -kernel /boot/vmlinux-4.19.6-un-def-alt3 \
  -drive file=rootfs.raw,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 \
  -append "earlyprintk root=/dev/vda rootwait fastboot console=ttyS0 debug sunrpc.debug STOP=udev" \
  -netdev user,id=eth0 -device virtio-net-device,netdev=eth0
</source>
 
To log-in to the shell:
Username: root
Password: 123
 
== Useful links: ==
 
* [https://github.com/dalegr/riscv-bbl-utils Berkeley bootloader utils] to merge the linux kernel in to the bbl.bin with the dummy payload.
* [https://riscv.org/specifications RISC-V specifications]
* [https://www.sifive.com/blog/all-aboard-part-0-introduction All Aboard] -- cool series of blog posts by Palmer Dabbelt about RISC-V, toolchain, etc.
* [http://0x1.tv/20180929H OSSDEVCONF-2018 (russian language)]


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Версия от 18:17, 7 марта 2019

RISC-V

RISC-V is an open and free instruction set architecture (ISA). The RISC-V ISA specifications are licensed under a Creative Commons license (CC BY 4.0). Anyone could get the final versions of the user-level ISA specifications and drafts of the compressed and privileged ISA specifications.

Another key feature of the RISC-V architecture that it is scalable and allows multiple implementations. The minimal specification has the commands to store and load, jump and integer arithmetic. It supports the 32-, 64- and 128-bit register sizes: "RV32I, RV64I and RV128I" ("I" stands for integer). This Linux port runs on "RV64IMAFDC" or "RV64GC" ("G" == "IMAFD"):

  • I - Integer and basic instructions
  • M - Multiply and divide
  • A - Atomic operations
  • F - Single precision floating point
  • D - Double precision floating point
  • C - Compressed instructions

At this page one could find the latest information about the status of the ALT porting to the new platform - RISC-V (RV64GC). The ALT port is building on the HiFive Unleashed board from SiFive.


Working plan

  • The following Linux kernels has been bare metal tested on SiFive HiFive Unleashed:
  • BOOT methods:
    • Berkeley bootloader -- DONE
    • U-BOOT (link) -- DONE
  • Sisyphus port -- IN PROGRESS
    1. Toolchain (see the status above) -- DONE
    2. Linux Kernel -- DONE
    3. X11 -- DONE
    4. Desktop Environment -- IN PROGRESS
  • ALT image metaprofile -- IN PROGRESS
  • Girar Builder -- IN PROGRESS
  • QEMU image (see below) -- DONE

One could find the rootfs latest snapshot (Nov 2018) at here. The RPM/SRPM repository at here.

QEMU

To run the ALT RISC-V port on QEMU one need to install the QEMU with riscv64 support.

In case of the ALT x86-64 host system for example: qemu-system-riscv-core.

Next stuff are needed:

After this steps were done it's time to run a kernel!

(possibly need to change path to the kernel and rootfs according to particular system)

 qemu-system-riscv64 \
  -nographic -machine virt -kernel /boot/vmlinux-4.19.6-un-def-alt3 \
  -drive file=rootfs.raw,format=raw,id=hd0 -device virtio-blk-device,drive=hd0 \
  -append "earlyprintk root=/dev/vda rootwait fastboot console=ttyS0 debug sunrpc.debug STOP=udev" \
  -netdev user,id=eth0 -device virtio-net-device,netdev=eth0

To log-in to the shell: Username: root Password: 123

Useful links: